Conventional field programmable gate arrays (FPGAs) include logic elements that can be configured by a user to implement various designs or functions. The logic elements are typically connected to other logic elements or other components of the conventional FPGA by programmable routing.
Conventional FPGAs can use the logic elements and programmable routing to perform operations such as shifts, gating, signal selection, etc. However, such operations typically require a large number of logic elements and extensive routing resources to perform. Accordingly, by allocating logic elements and other resources to the performance of such operations, conventional FPGAs reduce the available resources that could otherwise be used to implement user designs or perform other functions.